THE IMPACT OF GaN/SUBSTRATE THERMAL BOUNDARY RESISTANCE ON A HEMT DEVICE
نویسندگان
چکیده
The present work uses finite element thermal simulations of Gallium Nitride High Electron Mobility Transistors (GaN HEMTs) to evaluate the impact of device design parameters on the junction temperature. In particular the effects of substrate thickness, substrate thermal conductivity, GaN thickness, and GaN-to-substrate thermal boundary resistance (TBR) on device temperature rise are quantified. In all cases examined, the TBR was a dominant factor in overall device temperature rise. It is shown that a TBR increase can offset any benefits offered through a more conductive substrate and that there exists a substrate thickness independent of TBR which results in a minimum junction temperature. Additionally, the decrease of GaN thickness only provides a thermal benefit at small TBRs. For TBRs on the order of 10 -4 cm 2 K/W or greater, decreasing the GaN thickness can actually increase the temperature as the heat from the highly localized source is not sufficiently spread out before crossing the GaN-substrate boundary. The tradeoff between GaN heat spreading, substrate heat spreading, and temperature rise across the TBR results in a GaN thickness with minimum total temperature rise. For the TBR values of 10 -4 cm 2 K/W and 10 -3 cm 2 K/W these GaN thicknesses are 0.8 μm and 9 μm respectively. INTRODUCTION The Department of Defense (DoD) is actively developing Monolithic Microwave Integrated Circuit (MMIC) technology to enable Radio Frequency (RF) systems with reduced component count and increased power density [1]. Recently, quality improvements in Gallium Nitride (GaN) electronic materials and the development of the High Electron Mobility Transistor (HEMT) device structure have allowed order-ofmagnitude increases in both total power and power density over competing technologies [2]. However, the operating efficiency of these devices is highly dependent on their operating mode and frequency. Consequently, even high efficiency Power Amplifiers (PAs) require significant cooling to maintain high electrical performance and reliability [3,4]. This is complicated by the unique structure of GaN devices which are fabricated on multimaterial substrates optimized for electrical performance and not necessarily for heat transfer. Moreover, the HEMT structure creates highly localized hot spots in the active area of the device. As a result of these two conditions, the HEMT thermal stack is dominated by heat spreading and interface resistances, creating a challenging situation for thermal management. There have been several past efforts at thermally modeling the GaN HEMT device. In the series of reports by Calame, et al., the thermal performance of a GaN-HEMT package was evaluated in a number of material and package configurations, to examine the interaction of deviceand package-level thermal effects [5-7]. Darwish, et al., have provided an analytical thermal resistance expression based on the solution of Laplace‟s equations in prolate steroidal coordinates and elliptical cylinder coordinates [8-9]. More recently, Douglas, et al., modeled the effects of several HEMT design parameters including substrate thermal conductivity, the number of transistor gates, and die size [10]. These groups provided insights into device thermal behavior, but none addressed the issue of the inter-layer TBR present in the GaN HEMT material stack between the GaN and Substrate layers. The University of Bristol recently reported that this TBR in commercial devices on Silicon Carbide (SiC) substrates can reach levels greater than 6x10 -4 cm2K/W, which can increase the device‟s maximum temperature by up to 40%-50% [11,12]. The present study numerically examines the thermal characteristics of a GaN HEMT device and investigates the thermal impact of varying several device design parameters such as substrate thermal conductivity, substrate thickness, and GaN thickness. This investigation also includes the effect of the TBR, and shows that not only does ignoring this factor underpredict device temperature rise, but the interplay between TBR and heat spreading can lead to incorrect conclusions on how to improve HEMT thermal performance. 1 Copyright © 2011 by ASME This work is in part a work of the U.S. Government. ASME disclaims all interest in the U.S. Government’s contributions. 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